As circuitry and connecting lines on semiconductor wafers becomes smaller, research has focused on optimizing the optical system through which those printed lines are lithographed onto the wafer. As a general overview and in reference to FIG. 1, a driver 20 controls an illumination controller 23 that drives an illumination source 24 to illuminate a mask 26 or reticle. The mask includes features that act to diffract the illuminating radiation through a pupil 28 which may control directional extent of the illumination, and through a lens 30 onto an image plane such as a semiconductor wafer 32. The wafer 32 typically includes a resist (photoactive material). When the resist is exposed to the projected image, the developed features in the resist closely conform to the desired patterns forming a target image, which is now on the wafer 32. The pattern of features on the mask 26 acts as a diffracting structure analogous to a diffraction grating. Increased precision in the formed circuitry depends on minimum and maximum intensities of the illumination that strikes different positions of the wafer 26.
U.S. Pat. No. 5,680,588 describes a system in which global optimum illumination is found based on the desired characteristics of the image irradiance distribution embodied in a target aerial image. Optimum illumination is that which produces an aerial image closest to the predefined target aerial image. The source distribution necessary to achieve that closest aerial image derives from a set of aerial images that are created by addressing the available entrance pupil regions.
U.S. Pat. No. 6,563,566 describes a method to optimize combinations of illumination and mask patterns together to produce a desired pattern, such that the resulting mask patterns do not necessarily correspond to the desired patterns to be printed (e.g., by exploiting destructive interference to define dark areas that are not constrained to conform to the desired printed pattern). Because these optimal mask solutions often do not resemble the patterns being printed on the wafer, those optimal mask solutions are difficult to find using conventional optimization techniques. This invention extends the teachings of U.S. Pat. No. 6,563,566, which is hereby incorporated by reference. U.S. Pat. Publ. No. 2005/0122501 describes illuminating a mask with light from different directions so that intensities of the various light beams provide a larger integrated process window, including maximum intensities for overexposed tolerance positions and minimum intensities for underexposed tolerance positions.
Integrated circuit cells can be fabricated with higher yields if the lithographic masks used to print the circuit features are designed by global optimization, as described in U.S. Pat. No. 5,680,588 noted above. In this procedure the mask patterns are optimized to print an acceptable image with as large a process window as possible. When the optimization is carried out in a global way, the resulting solutions often differ from standard design forms, particularly when the illumination contains strong off-axis components, since in this case images are formed with bright and dark interference lobes whose positions are very different from those of the diffracting mask features. When the cell contains circuit elements that are difficult to print, the difference between the globally maximum process window and the process window provided by a conventionally optimized design can determine whether or not it is feasible to manufacture the cell.
Global optimization is particularly described in a paper by Rosenbluth, et al., entitled “Optimum Mask and Source Patterns to Print a Given Shape,” JM3 1, no. 1 (2002): p. 13, hereinafter referred to as “Rosenbluth et al.”.
However, one impediment to wider adoption of the global method described in Rosenbluth et al. is its significant computational cost, which increases very rapidly as cell size is increased. A speed ‘bottleneck’ arises in globally optimizing the wavefront that projects from the mask 26, i.e. finding the mask diffraction pattern which produces the highest possible process window when deployed with some given source 24 (fixed, at least temporarily). Note here that “diffraction pattern” is a shorthand term for the set of diffraction orders that are collected by the lens 30 when the particular fixed source 24 is employed.
This invention reduces that complexity so that optimal masks can be designed and prepared for a large target surface 32, such as a SRAM or DRAM would require.